FIG. 1 shows a UHF transponder with its general architecture. The transponder 2 has an electronic circuit 4 and an antenna 6. The UHF antenna is formed by two branches connected by a stub inductor (DC short). The electronic circuit has a rectifier 8 providing a positive voltage Vdd for supplying this electronic circuit. It is to be noted that the transponder can have a battery instead of the rectifier or both. The electronic circuit further comprises a memory and a logic circuit 10, a demodulator 12 for demodulating signals received from a determined reader and a modulator 14 used to generate signals for the reader.
The antenna has a first pad 16 connected to the ground Gnd of the electronic circuit which corresponds to the low voltage Vss of this circuit. The second pad 18 of the antenna is connected in particular to the modulator 14. This modulator is also generally connected to the ground Gnd.
FIGS. 2A and 2B shows a classical modulator incorporated in a transponder or tag of the type represented in FIG. 1. This modulator is formed by a NMOS transistor 22 having its source 24 and its substrate 26 connected to Vss (Gnd). The drain 28 of the transistor 22 is connected to a terminal ‘Ant’ of the modulator which is connected to the pad 18 of the antenna 6. In some applications, a series capacitor is placed between the transistor's drain and the antenna pad. The NMOS transistor has also a gate 30 which received a control signal Vg whose value (‘High’ or ‘Low’) depends from the logic signal Tx (‘1’ or ‘0’) provided to the modulator 14 by the logic circuit 10 (FIG. 1). The NMOS transistor is selected because it turns on (‘ON’) when Vg is High and preferably approximately to Vdd and it turns off (‘OFF’) when Vg is Low and preferably approximately to Gnd. Thus, it is easy to switch the NMOS transistor with the available voltage range in the electronic circuit (Vss=Gnd to Vdd which is generally positive, e.g. +3V). The modulator performs e.g. ASK and/or PSK on the RF signal backscattered by the tag/transponder.
Such a classical design has in fact a major drawback because the alternative signal received on the antenna 6 has positive and negative swings. The negative swing can give rise to a functional problem for the transponder. Indeed, in NMOS modulators a parasitic diode 20 exists between the n-type drain 28 and the p-type substrate 26 (the p-part of the parasitic diode 20 in the substrate is represented by a dotted line). In high field conditions, the negative swing on the antenna pad can be large enough to turn this parasitic diode on. This results in the injection of electrons from the n-type drain region into the p-type substrate. Electrons become minority carriers when injected in the p-substrate. Thus, they can travel over distances of several tens of micrometers or more before being finally collected by an n-type region. When collected in sensitive circuits (voltage/current references, amplifiers, etc. . . . ), these carriers modify the behavior of these sensitive circuits and can even kill their functionality. Consequently, the dynamic range (i.e. maximum power that the tag can sustain on its antenna pad 18 while still operating normally) is limited to the point where minority carrier injection starts.
A solution to the above mentioned problem is to rely on a process that offers deep n-well or triple well. This allows isolating the NMOS modulator from the rest of the electronic circuit and stopping the propagation of minority carriers. However, such a technology causes additional costs (masks, fabrication steps . . . ), which have direct repercussions on the final price per tag.
General information about MOSFETs and the CMOS technology can respectively be found e.g. in the book of Michael Quirk & Julian Serda, entitled “Semiconductor manufacturing technology”, 2001 Dec. 31, Prentice Hall, Upper Saddle River N.J. USA, pages 53-59, (ISBN:0130815209); and in the article “6.2 The well controversy in CMOS” In: Stanley Wolf: “Silicon Processing for the VLSI era”, 1990 Dec. 31, Lattice Press, Sunset Beach Calif. USA, vol. 2, pages 381-384.
The aim of the present invention is to overcome the above mentioned problem without having to use a more complicated technology that increases the price of the electronic circuit, but by using a technology corresponding to the standard CMOS technology.